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SiC Epitaxial Wafer – 4H/6H SiC Substrates Custom Thickness Doping
Product Details:
| Place of Origin: | China |
| Brand Name: | ZMSH |
| Model Number: | 4 inch |
Payment & Shipping Terms:
| Minimum Order Quantity: | 10 |
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| Price: | 5 USD |
| Packaging Details: | custom cartons |
| Delivery Time: | 4-8 weeks |
| Payment Terms: | T/T |
| Supply Ability: | By case |
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Detail Information |
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| Grade: | Zero MPD Grade,Production Grade,Research Grade,Dummy Grade | Resistivity 4H-N: | 0.015~0.028 Ω•cm |
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| Resistivity 4/6H-SI: | ≥1E7 Ω·cm | Primary Flat: | {10-10}±5.0° Or Round Shape |
| TTV/Bow /Warp: | ≤10μm /≤10μm /≤15μm | Roughness: | Polish Ra≤1 Nm / CMP Ra≤0.5 Nm |
Product Description
SiC Epitaxial Wafer Overview
4-inch (100 mm) SiC Epitaxial Wafers continue to play a vital role in the semiconductor market, serving as a highly mature and reliable platform for power electronics and RF device manufacturers worldwide. The 4” wafer size strikes an excellent balance between performance, availability, and cost-effectiveness—making it the industry’s mainstream choice for mid-to-high volume production.
SiC epitaxial wafers consist of a thin, precisely controlled layer of silicon carbide deposited on a high-quality monocrystalline SiC substrate. The epitaxial layer is engineered for uniform doping, excellent crystalline quality, and ultra-smooth surface finish. With a wide bandgap (3.2 eV), high critical electric field (~3 MV/cm), and high thermal conductivity, 4” SiC epitaxial wafers enable devices that outperform silicon in high-voltage, high-frequency, and high-temperature applications.
Many industries—ranging from electric vehicles to solar energy and industrial drives—continue to rely on 4” SiC epitaxial wafers to manufacture efficient, robust, and compact power electronics.
Manufacturing Principle
The production of 4” SiC epitaxial wafers involves a highly controlled Chemical Vapor Deposition (CVD) process:
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Substrate Preparation
High-purity 4” 4H-SiC or 6H-SiC substrates undergo advanced chemical-mechanical polishing (CMP) to create atomically smooth surfaces, minimizing defects during epitaxial growth. -
Epitaxial Layer Growth
In CVD reactors, gases such as silane (SiH₄) and propane (C₃H₈) are introduced at high temperatures (~1600–1700 °C). These gases decompose and deposit on the substrate, forming a new crystalline SiC layer. -
Controlled Doping
Dopants like nitrogen (n-type) or aluminum (p-type) are carefully introduced to tune electrical properties such as resistivity and carrier concentration. -
Precision Monitoring
Real-time monitoring ensures tight control of thickness uniformity and doping profiles across the entire 4” wafer. -
Post-Processing Quality Control
Finished wafers undergo rigorous testing:-
Atomic Force Microscopy (AFM) for surface roughness
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Raman spectroscopy for stress and defects
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X-ray diffraction (XRD) for crystallographic quality
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Photoluminescence for defect mapping
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Bow/warp measurements
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Specifications
| 4inch diameter Silicon Carbide (SiC) Substrate Specification | |||||||||
| Grade | Zero MPD Grade | Production Grade | Research Grade | Dummy Grade | |||||
| Diameter | 100. mm±0.5mm | ||||||||
| Thickness | 350 μm±25μm or 500±25um Or other customized thickness | ||||||||
| Wafer Orientation | Off axis : 4.0° toward <1120> ±0.5° for 4H-N/4H-SI On axis : <0001>±0.5° for 6H-N/6H-SI/4H-N/4H-SI | ||||||||
| Micropipe Density | ≤0 cm-2 | ≤1cm-2 | ≤5cm-2 | ≤10 cm-2 | |||||
| Resistivity | 4H-N | 0.015~0.028 Ω•cm | |||||||
| 6H-N | 0.02~0.1 Ω•cm | ||||||||
| 4/6H-SI | ≥1E5 Ω·cm | ||||||||
| Primary Flat | {10-10}±5.0° | ||||||||
| Primary Flat Length | 18.5 mm±2.0 mm | ||||||||
| Secondary Flat Length | 10.0mm±2.0 mm | ||||||||
| Secondary Flat Orientation | Silicon face up: 90° CW. from Prime flat ±5.0° | ||||||||
| Edge exclusion | 1 mm | ||||||||
| TTV/Bow /Warp | ≤10μm /≤10μm /≤15μm | ||||||||
| Roughness | Polish Ra≤1 nm | ||||||||
| CMP Ra≤0.5 nm | |||||||||
| Cracks by high intensity light | None | 1 allowed, ≤2 mm | Cumulative length ≤ 10mm, single length≤2mm | ||||||
| Hex Plates by high intensity light | Cumulative area ≤1% | Cumulative area ≤1% | Cumulative area ≤3% | ||||||
| Polytype Areas by high intensity light | None | Cumulative area ≤2% | Cumulative area ≤5% | ||||||
| Scratches by high intensity light | 3 scratches to 1×wafer diameter cumulative length | 5 scratches to 1×wafer diameter cumulative length | 5 scratches to 1×wafer diameter cumulative length | ||||||
| edge chip | None | 3 allowed, ≤0.5 mm each | 5 allowed, ≤1 mm each | ||||||
Applications
4” SiC epitaxial wafers enable mass production of reliable power devices in sectors including:
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Electric Vehicles (EVs)
Traction inverters, onboard chargers, and DC/DC converters. -
Renewable Energy
Solar string inverters, wind power converters. -
Industrial Drives
Efficient motor drives, servo systems. -
5G / RF Infrastructure
Power amplifiers and RF switches. -
Consumer Electronics
Compact, high-efficiency power supplies.
Frequently Asked Questions (FAQ)
1. Why choose SiC epitaxial wafers over silicon?
SiC offers higher voltage and temperature tolerance, enabling smaller, faster, and more efficient devices.
2. What is the most common SiC polytype?
4H-SiC is the preferred choice for most high-power and RF applications due to its wide bandgap and high electron mobility.
3. Can the doping profile be customized?
Yes, doping level, thickness, and resistivity can be fully tailored to application needs.
4. Typical lead time?
Standard lead time is 4–8 weeks, depending on wafer size and order volume.
5. What quality checks are performed?
Comprehensive testing including AFM, XRD, defect mapping, carrier concentration analysis.
6. Are these wafers compatible with silicon fab equipment?
Mostly yes; minor adjustments are needed due to different material hardness and thermal properties.
Related Products
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